For years, the semiconductor and equipment industry has congregated at the annual Semicon West trade show in San Francisco.
It’s an event to get an update on the latest equipment, test and packaging technologies. It’s also a good way to meet with people who you haven’t seen in a year, if not longer. It’s a great way to get a pulse on the industry.
Needless to say, Semicon is a virtual event this year. Virtual events have their places. It’s no substitute for an in-person event.
Still, at the virtual Semicon event, one can get an idea of what the industry is thinking and where it’s heading. It’s impossible to write-up everything that is happening at this year’s Semicon West. So, I will highlight just a few of the events.
Semicon actually started last week, when Imec held its annual event. It was a virtual event. As before, Imec gave several presentations, outlining where the technology is heading.
From a system point of view, Imec splits hardware into three categories—data center, mobile/handhelds, and IoT/edge. “For all of these market segments, dimensional scaling of logic, memory and packaging will be needed,” said Sri Samavedam, senior vice president of CMOS technologies at Imec, in a presentation during the event. “But that is not sufficient to provide the PPA value. We expect new materials will be needed to improve the functionality or an improvement in performance will be needed. In addition to new materials, new architectures will also show up.”
The new architectures include traditional system-on-a-chip (SoC) products, AI accelerators, and 2.5D/3D technologies. The good news is that transistor density scaling continues at each node. The problem is that the performance improvements have been slowing.
That doesn’t seem to be stopping the industry from scaling. At the event, Imec presented a slide on its latest logic roadmap. On the transistor front, chipmakers are currently shipping finFET transistors, which will extend to the 3nm and/or 2nm foundry node. Then, at 3nm or 2nm, chipmakers are expected to migrate to the nanosheet FET.
The nanosheet FET could extend beyond 2nm. At 2nm, Imec is developing what is calls a Forksheet FET. Then at 1nm, the R&D organization is developing a complementary FET (CFET). According to Imec’s roadmap, a CFET with 2D channel materials could appear at the sub-1nm node.
Al Gore, the former vice president of the United States, on Tuesday kicked off Semicon West with a sobering keynote on the threat posed by climate change. Gore is the co-founder and chairman of Generation Investment Management, and the founder and chairman of The Climate Reality Project. He is also a senior partner at Kleiner Perkins Caufield & Byers and a member of Apple’s…
Read more:: Semicon West Day One/Two